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End-to-End Multi-Target Verification Environment for a RISC..:
Korsman, Aleksi
;
Hirvonen, Verneri
;
Simola, Otto
...
International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design. , 2023
Link:
https://aaltodoc.aalto.fi/handle/123456789/126526
RT Journal T1 <Title>End-to-End Multi-Target Verification Environment for a RISC-V Microprocessor</Title> UL https://suche.suub.uni-bremen.de/peid=base-ftaaltouniv:oai:aaltodoc.aalto.fi:123456789_126526&Exemplar=1&LAN=DE A1 Korsman, Aleksi A1 Hirvonen, Verneri A1 Simola, Otto A1 Tarkka, Antti A1 Kosunen, Marko A1 Ryynanen, Jussi YR 2023 K1 FPGA K1 microprocessor K1 RISC-V K1 TheSyDe-Kick K1 verification JF International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design LK http://dx.doi.org/https://aaltodoc.aalto.fi/handle/123456789/126526 DO https://aaltodoc.aalto.fi/handle/123456789/126526 SF ELIB - SuUB Bremen
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