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1 Ergebnisse
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A thomas algorithm-based generic approach for modeling of p..:
Tripathi, J.N. (Jai Narayan)
;
Illikkal, M.S. (Muhammed Suhail)
;
Shrimali, H. (Hitesh)
.
https://ir.library.carleton.ca/pub/26183. , 2019
Link:
https://ir.library.carleton.ca/pub/26183
RT Journal T1
A thomas algorithm-based generic approach for modeling of power supply induced jitter in CMOS buffers
UL https://suche.suub.uni-bremen.de/peid=base-ftcarletonunivir:oai:carleton.ca:26183&Exemplar=1&LAN=DE A1 Tripathi, J.N. (Jai Narayan) A1 Illikkal, M.S. (Muhammed Suhail) A1 Shrimali, H. (Hitesh) A1 Achar, R. (Ram) YR 2019 K1 chain of inverters K1 clock-network K1 CMOS inverter K1 delay-line K1 I/O K1 jitter K1 power supply induced jitter K1 power supply noise K1 tapered buffer K1 time interval error JF https://ir.library.carleton.ca/pub/26183 LK http://dx.doi.org/https://ir.library.carleton.ca/pub/26183 DO https://ir.library.carleton.ca/pub/26183 SF ELIB - SuUB Bremen
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