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Design of a Reliable XOR-XNOR Circuit for Arithmetic Logic ..:
Karmani, Mouna
;
Khedhiri, Chiraz
;
Hamdi, Belgacem
...
info:eu-repo/semantics/altIdentifier/doi/10.1007/978-3-642-35606-3_61. , 2012
Link:
https://inria.hal.science/hal-01551326
RT Journal T1 <Title>Design of a Reliable XOR-XNOR Circuit for Arithmetic Logic Units</Title> UL https://suche.suub.uni-bremen.de/peid=base-ftccsdartic:oai:HAL:hal-01551326v1&Exemplar=1&LAN=DE A1 Karmani, Mouna A1 Khedhiri, Chiraz A1 Hamdi, Belgacem A1 Rahmani, Amir-Mohammad A1 Man, Ka, Lok A1 Wan, Kaiyu PB HAL CCSD; Springer YR 2012 K1 XOR-XNOR circuits K1 Concurrent Error Detection K1 fault-secure property K1 self-testing property K1 fault model K1 [INFO]Computer Science [cs] JF info:eu-repo/semantics/altIdentifier/doi/10.1007/978-3-642-35606-3_61 LK http://dx.doi.org/https://inria.hal.science/hal-01551326 DO https://inria.hal.science/hal-01551326 SF ELIB - SuUB Bremen
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