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1 Ergebnisse
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CMOS backend-of-line compatible memory array and logic circ..:
Wenhui Wang
;
Ke Li
;
Jun Lan
...
https://doi.org/10.1038/s41467-023-41868-5. , 2023
Link:
https://doi.org/10.1038/s41467-023-41868-5
RT Journal T1 <Title>CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor</Title> UL https://suche.suub.uni-bremen.de/peid=base-ftdoajarticles:oai:doaj.org_article:054db449a3d24cb4890317b069cfc85b&Exemplar=1&LAN=DE A1 Wenhui Wang A1 Ke Li A1 Jun Lan A1 Mei Shen A1 Zhongrui Wang A1 Xuewei Feng A1 Hongyu Yu A1 Kai Chen A1 Jiamin Li A1 Feichi Zhou A1 Longyang Lin A1 Panpan Zhang A1 Yida Li PB Nature Portfolio YR 2023 K1 Science K1 Q JF https://doi.org/10.1038/s41467-023-41868-5 LK http://dx.doi.org/https://doi.org/10.1038/s41467-023-41868-5 DO https://doi.org/10.1038/s41467-023-41868-5 SF ELIB - SuUB Bremen
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