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1 Ergebnisse
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Minimization of DC-Link Capacitance and Improved Operationa..:
Almachius Kahwa
;
Hidemine Obara
;
Yasutaka Fujimoto
https://ieeexplore.ieee.org/document/9739912/. , 2022
Link:
https://doi.org/10.1109/OJPEL.2022.3160867
RT Journal T1
Minimization of DC-Link Capacitance and Improved Operational Performance of a 5-Level Hybrid Multilevel DC-Link Inverter
UL https://suche.suub.uni-bremen.de/peid=base-ftdoajarticles:oai:doaj.org_article:45d4cde6b1dc4133b4d16de48283f4ea&Exemplar=1&LAN=DE A1 Almachius Kahwa A1 Hidemine Obara A1 Yasutaka Fujimoto PB IEEE YR 2022 K1 H-bridge K1 H6D2 K1 5-level inverter K1 multilevel dc-link (MLDCL) inverter K1 minimization of capacitance K1 phase-shifted PWM K1 Electrical engineering. Electronics. Nuclear engineering K1 TK1-9971 JF https://ieeexplore.ieee.org/document/9739912/ LK http://dx.doi.org/https://doi.org/10.1109/OJPEL.2022.3160867 DO https://doi.org/10.1109/OJPEL.2022.3160867 SF ELIB - SuUB Bremen
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