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An Optimization Framework for the Design of High-Speed PCB ..:
Gianfranco Avitabile
;
Antonello Florio
;
Vito Leonardo Gallo
..
Circuit and Signal Processing. , 2022
Link:
https://doi.org/10.3390/electronics11030475
RT Journal T1
An Optimization Framework for the Design of High-Speed PCB VIAs
UL https://suche.suub.uni-bremen.de/peid=base-ftmdpi:oai:mdpi.com:_2079-9292_11_3_475_&Exemplar=1&LAN=DE A1 Gianfranco Avitabile A1 Antonello Florio A1 Vito Leonardo Gallo A1 Alessandro Pali A1 Lorenzo Forni PB Multidisciplinary Digital Publishing Institute YR 2022 K1 signal integrity K1 high-performance PCB K1 PCB interconnection optimization K1 VIA hole design JF Circuit and Signal Processing LK http://dx.doi.org/https://doi.org/10.3390/electronics11030475 DO https://doi.org/10.3390/electronics11030475 SF ELIB - SuUB Bremen
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