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1 Ergebnisse
1
Eliminating Charge Sharing in Clocked Logic Gates on the De..:
Trommer, Jens
;
Simon, Maik
;
Slesazeck, Stefan
..
978-1-72811-539-9. , 2019
Link:
https://nbn-resolving.org/urn:nbn:de:bsz:14-qucosa2-79..
RT Journal T1
Eliminating Charge Sharing in Clocked Logic Gates on the Device Level Employing Transistors with Multiple Independent Inputs
UL https://suche.suub.uni-bremen.de/peid=base-fttudresden:oai:qucosa:de:qucosa:79714&Exemplar=1&LAN=DE A1 Trommer, Jens A1 Simon, Maik A1 Slesazeck, Stefan A1 Weber, Walter M A1 Mikolajick, Thomas PB IEEE YR 2019 K1 dynamische Logikgatter K1 Ladungsteilung K1 Domino-Logik K1 rekonfigurierbarer Transistor K1 Schottky-Transistoren K1 Multi-Gate K1 dynamic logic gates K1 charge sharing K1 domino logic K1 reconfigurable transistor K1 Schottky transistors K1 info:eu-repo/classification/ddc/621.3 K1 ddc:621.3 JF 978-1-72811-539-9 LK http://dx.doi.org/https://nbn-resolving.org/urn:nbn:de:bsz:14-qucosa2-797144 DO https://nbn-resolving.org/urn:nbn:de:bsz:14-qucosa2-797144 SF ELIB - SuUB Bremen
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