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1 Ergebnisse
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Design and security evaluation of secure cryptoharware (FPG..:
Tena Sánchez, Erica
;
Potestad Ordóñez, Francisco Eugenio
;
Parra Fernández, María del Pilar
...
Sinergías en la investigación en STEM. , 2022
Link:
https://idus.us.es/handle//11441/132940
RT Journal T1
Design and security evaluation of secure cryptoharware (FPGA and ASIC) against hackers exploiting side-channel information ; Diseño y evaluación de la seguridad de hardware criptográfico seguro (FPGA and ASIC) contra hackers que explotan información de canal lateral
UL https://suche.suub.uni-bremen.de/peid=base-ftunivsevillair:oai:idus.us.es:11441_132940&Exemplar=1&LAN=DE A1 Tena Sánchez, Erica A1 Potestad Ordóñez, Francisco Eugenio A1 Parra Fernández, María del Pilar A1 Baena Oliva, María del Carmen A1 Valencia Barrero, Manuel A1 Jiménez Fernández, Carlos Jesús A1 Acosta Jiménez, Antonio José PB 3ciencias YR 2022 JF Sinergías en la investigación en STEM LK http://dx.doi.org/https://idus.us.es/handle//11441/132940 DO https://idus.us.es/handle//11441/132940 SF ELIB - SuUB Bremen
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