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1 Ergebnisse
1
Quantitative characterization of the software layer of a HW..:
Cano Reyes, José
;
Kumar, Rakesh
;
Brankovic, Aleksandar
...
http://ieeexplore.ieee.org/document/7581274/. , 2016
Link:
http://hdl.handle.net/2117/99687
RT Journal T1
Quantitative characterization of the software layer of a HW/SW co-designed processor
UL https://suche.suub.uni-bremen.de/peid=base-ftupcatalunya:oai:upcommons.upc.edu:2117_99687&Exemplar=1&LAN=DE A1 Cano Reyes, José A1 Kumar, Rakesh A1 Brankovic, Aleksandar A1 Pavlou, Demos A1 Stavrou, Kyriakos A1 Gibert Codina, Enric A1 Martínez, Alejandro A1 González Colás, Antonio María PB Institute of Electrical and Electronics Engineers (IEEE) YR 2016 K1 Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors K1 Microprocessors -- Design and construction K1 Hardware-software codesign K1 Microprocessor chips K1 Optimisation K1 Quantitative characterization K1 Software layer performance K1 HW/SW codesigned processor K1 Dynamic binary translation K1 Runtime application behavior K1 Hybrid architectures K1 Translation overheads K1 Optimization overheads K1 Microarchitectural resources K1 Software layer design K1 Hardware-software codesigned processor K1 Microprocessadors -- Disseny i construcció JF http://ieeexplore.ieee.org/document/7581274/ LK http://hdl.handle.net/2117/99687 DO http://hdl.handle.net/2117/99687 SF ELIB - SuUB Bremen
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