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1 Ergebnisse
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Vector processing-aware advanced clock-gating techniques fo..:
Ratkovic, Ivan
;
Palomar Pérez, Óscar
;
Stanic, Milan
...
https://ieeexplore.ieee.org/document/8252727/. , 2018
Link:
http://hdl.handle.net/2117/116231
RT Journal T1
Vector processing-aware advanced clock-gating techniques for low-power fused multiply-add
UL https://suche.suub.uni-bremen.de/peid=base-ftupcatalunyair:oai:upcommons.upc.edu:2117_116231&Exemplar=1&LAN=DE A1 Ratkovic, Ivan A1 Palomar Pérez, Óscar A1 Stanic, Milan A1 Unsal, Osman Sabri A1 Cristal Kestelman, Adrián A1 Valero Cortés, Mateo YR 2018 K1 Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors K1 Microprocessors -- Energy consumption K1 Digital arithmetic K1 Clock-gating K1 Low power K1 Vector processors K1 Fused multiply-add K1 Methodologies K1 Microprocessadors -- Consum d'energia JF https://ieeexplore.ieee.org/document/8252727/ LK http://hdl.handle.net/2117/116231 DO http://hdl.handle.net/2117/116231 SF ELIB - SuUB Bremen
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