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Functional verification of a RISC-V vector accelerator:
Jiménez Arador, Víctor
;
Rodriguez, Mario
;
Dominguez de la Rocha, Marc
...
https://ieeexplore.ieee.org/document/9993792. , 2023
Link:
http://hdl.handle.net/2117/382717
RT Journal T1
Functional verification of a RISC-V vector accelerator
UL https://suche.suub.uni-bremen.de/peid=base-ftupcatalunyair:oai:upcommons.upc.edu:2117_382717&Exemplar=1&LAN=DE A1 Jiménez Arador, Víctor A1 Rodriguez, Mario A1 Dominguez de la Rocha, Marc A1 Sans, Josep A1 Díaz Ortega, Iván A1 Valente, Luca A1 Guglielmi, Vito Luca A1 Quiroga Esparza, Josué Vladimir A1 Genovese, Roberto Ignacio A1 Sonmez, Nehir A1 Palomar Pérez, Óscar A1 Moreto Planas, Miquel PB Institute of Electrical and Electronics Engineers (IEEE) YR 2023 K1 Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors K1 Microprocessors -- Verification K1 European Processor Initiative (EPI) K1 Verification K1 RISC-V K1 Vector accelerator K1 UVM K1 Coverage K1 Random binary generation K1 Microprocessadors -- Verificació JF https://ieeexplore.ieee.org/document/9993792 LK http://hdl.handle.net/2117/382717 DO http://hdl.handle.net/2117/382717 SF ELIB - SuUB Bremen
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