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1 Ergebnisse
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Vitruvius+: An area-efficient RISC-V decoupled vector copro..:
Minervini Minervini, Francesco
;
Palomar Pérez, Óscar
;
Unsal, Osman Sabri
...
https://dl.acm.org/doi/full/10.1145/3575861. , 2023
Link:
http://hdl.handle.net/2117/384848
RT Journal T1
Vitruvius+: An area-efficient RISC-V decoupled vector coprocessor for high performance computing applications
UL https://suche.suub.uni-bremen.de/peid=base-ftupcatalunyair:oai:upcommons.upc.edu:2117_384848&Exemplar=1&LAN=DE A1 Minervini Minervini, Francesco A1 Palomar Pérez, Óscar A1 Unsal, Osman Sabri A1 Reggiani, Enrico A1 Quiroga Esparza, Josué Vladimir A1 Marimon Illana, Joan A1 Rojas Morales, Carlos A1 Figueras Bagué, Roger A1 Ruíz Ramírez, Abraham Josafat A1 González Trejo, Alberto A1 Mendoza Escobar, Jonnatan A1 Vargas Valdivieso, Ivan A1 Hernández Calderón, César Alejandro A1 Cabre Olive, Joan A1 Khoirunisya, Lina A1 Bouhali, Mustapha A1 Pavón Rivera, Julián A1 Moll Echeto, Francisco de Borja A1 Olivieri, Mauro A1 Kovac, Mario A1 Kovac, Mate A1 Dragic, Leon A1 Valero Cortés, Mateo A1 Cristal Kestelman, Adrián YR 2023 K1 Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors K1 Vector processing (Computer science) K1 High performance computing K1 Energy consumption K1 RISC-V K1 Vector accelerator K1 SIMD K1 HPC K1 Tractament vectorial K1 Càlcul intensiu (Informàtica) K1 Energia -- Consum JF https://dl.acm.org/doi/full/10.1145/3575861 LK http://hdl.handle.net/2117/384848 DO http://hdl.handle.net/2117/384848 SF ELIB - SuUB Bremen
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