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1 Ergebnisse
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Ultralow power, noise immune stacked‐double stage clocked‐i..:
Ghimiray, Sapna Rani
;
Meher, Preetisudha
;
Dutta, Pranab Kishore
International Journal of Circuit Theory and Applications. 46 (2018) 11 - p. 1953-1967 , 2018
Link:
https://doi.org/10.1002/cta.2524
RT Journal T1 <Title>Ultralow power, noise immune stacked‐double stage clocked‐inverter domino technique for ultradeep submicron technology</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1002_cta.2524&Exemplar=1&LAN=DE A1 Ghimiray, Sapna Rani A1 Meher, Preetisudha A1 Dutta, Pranab Kishore PB Wiley YR 2018 SN 0098-9886 SN 1097-007X JF International Journal of Circuit Theory and Applications VO 46 IS 11 SP 1953 OP 1967 LK http://dx.doi.org/https://doi.org/10.1002/cta.2524 DO https://doi.org/10.1002/cta.2524 SF ELIB - SuUB Bremen
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