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1 Ergebnisse
1
Design of 16-Bit Vedic Multiplier Using Modified Logic Gate..:
, In:
Lecture Notes in Electrical Engineering; VLSI, Microwave and Wireless Technologies
,
Rupa Lakshmi, K.
;
Bala Sindhuri, Kandula
;
Mani Kumar, K.
. - p. 65-72 , 2022
Link:
https://doi.org/10.1007/978-981-19-0312-0_8
RT T1
Lecture Notes in Electrical Engineering; VLSI, Microwave and Wireless Technologies
: T1
Design of 16-Bit Vedic Multiplier Using Modified Logic Gates and BEC Technique
UL https://suche.suub.uni-bremen.de/peid=cr-10.1007_978-981-19-0312-0_8&Exemplar=1&LAN=DE A1 Rupa Lakshmi, K. A1 Bala Sindhuri, Kandula A1 Mani Kumar, K. A1 Udaya Kumar, N. PB Springer Nature Singapore YR 2022 SP 65 OP 72 LK http://dx.doi.org/https://doi.org/10.1007/978-981-19-0312-0_8 DO https://doi.org/10.1007/978-981-19-0312-0_8 SF ELIB - SuUB Bremen
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