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Exploiting symmetry in temporal logic model checking:
Clarke, E. M.
;
Enders, R.
;
Filkorn, T.
.
Formal Methods in System Design. 9 (1996) 1-2 - p. 77-104 , 1996
Link:
https://doi.org/10.1007/bf00625969
RT Journal T1 <Title>Exploiting symmetry in temporal logic model checking</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1007_bf00625969&Exemplar=1&LAN=DE A1 Clarke, E. M. A1 Enders, R. A1 Filkorn, T. A1 Jha, S. PB Springer Science and Business Media LLC YR 1996 SN 0925-9856 SN 1572-8102 JF Formal Methods in System Design VO 9 IS 1-2 SP 77 OP 104 LK http://dx.doi.org/https://doi.org/10.1007/bf00625969 DO https://doi.org/10.1007/bf00625969 SF ELIB - SuUB Bremen
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