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Designing VLSI network nodes to reduce memory traffic in a ..:
Dickey, Susan
;
Gottlieb, Allan
;
Kenner, Richard
.
Circuits, Systems, and Signal Processing. 6 (1987) 2 - p. 217-238 , 1987
Link:
https://doi.org/10.1007/bf01598960
RT Journal T1
Designing VLSI network nodes to reduce memory traffic in a shared memory parallel computer
UL https://suche.suub.uni-bremen.de/peid=cr-10.1007_bf01598960&Exemplar=1&LAN=DE A1 Dickey, Susan A1 Gottlieb, Allan A1 Kenner, Richard A1 Liu, Yue -Sheng PB Springer Science and Business Media LLC YR 1987 SN 0278-081X SN 1531-5878 JF Circuits, Systems, and Signal Processing VO 6 IS 2 SP 217 OP 238 LK http://dx.doi.org/https://doi.org/10.1007/bf01598960 DO https://doi.org/10.1007/bf01598960 SF ELIB - SuUB Bremen
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