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1 Ergebnisse
1
Pipeline Reconfigurable DSP for Dynamically Reconfigurable ..:
Warrier, Rakesh
;
Zhang, Wei
;
Vun, Chan Hua
Circuits, Systems, and Signal Processing. 36 (2017) 9 - p. 3799-3824 , 2017
Link:
https://doi.org/10.1007/s00034-017-0493-x
RT Journal T1 <Title>Pipeline Reconfigurable DSP for Dynamically Reconfigurable Architectures</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1007_s00034-017-0493-x&Exemplar=1&LAN=DE A1 Warrier, Rakesh A1 Zhang, Wei A1 Vun, Chan Hua PB Springer Science and Business Media LLC YR 2017 SN 0278-081X SN 1531-5878 JF Circuits, Systems, and Signal Processing VO 36 IS 9 SP 3799 OP 3824 LK http://dx.doi.org/https://doi.org/10.1007/s00034-017-0493-x DO https://doi.org/10.1007/s00034-017-0493-x SF ELIB - SuUB Bremen
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