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2$$\times $$VDD 500 MHz Digital Output Buffer with Optimal ..:

Wang, Chua-Chin ; Lou, Pang-Yen ; Tsai, Tsung-Yi..
Circuits, Systems, and Signal Processing.  40 (2020)  6 - p. 2824-2840 , 2020
Link: https://doi.org/10.1007/s00034-020-01594-5