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High Efficient Polyphase Digital Down Converter on FPGA:
Datta, Debarshi
;
Dutta, Himadri Sekhar
Circuits, Systems, and Signal Processing. 40 (2021) 11 - p. 5787-5798 , 2021
Link:
https://doi.org/10.1007/s00034-021-01749-y
RT Journal T1 <Title>High Efficient Polyphase Digital Down Converter on FPGA</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1007_s00034-021-01749-y&Exemplar=1&LAN=DE A1 Datta, Debarshi A1 Dutta, Himadri Sekhar PB Springer Science and Business Media LLC YR 2021 SN 0278-081X SN 1531-5878 JF Circuits, Systems, and Signal Processing VO 40 IS 11 SP 5787 OP 5798 LK http://dx.doi.org/https://doi.org/10.1007/s00034-021-01749-y DO https://doi.org/10.1007/s00034-021-01749-y SF ELIB - SuUB Bremen
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