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1 Ergebnisse
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FPGA-implementation of dynamic time delay neural network fo..:
Bahoura, Mohammed
;
Park, Chan-Wang
Analog Integrated Circuits and Signal Processing. 73 (2012) 3 - p. 819-828 , 2012
Link:
https://doi.org/10.1007/s10470-012-9857-0
RT Journal T1 <Title>FPGA-implementation of dynamic time delay neural network for power amplifier behavioral modeling</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1007_s10470-012-9857-0&Exemplar=1&LAN=DE A1 Bahoura, Mohammed A1 Park, Chan-Wang PB Springer Science and Business Media LLC YR 2012 SN 0925-1030 SN 1573-1979 JF Analog Integrated Circuits and Signal Processing VO 73 IS 3 SP 819 OP 828 LK http://dx.doi.org/https://doi.org/10.1007/s10470-012-9857-0 DO https://doi.org/10.1007/s10470-012-9857-0 SF ELIB - SuUB Bremen
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