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1 Ergebnisse
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A 14-bit column-parallel two-step SA ADC with digital calib..:
Li, Zhelu
;
Xie, Ning
;
Fan, Wei
...
Analog Integrated Circuits and Signal Processing. 100 (2018) 2 - p. 295-309 , 2018
Link:
https://doi.org/10.1007/s10470-018-1368-1
RT Journal T1 <Title>A 14-bit column-parallel two-step SA ADC with digital calibration based on scaled references and redundancy for CMOS image sensors</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1007_s10470-018-1368-1&Exemplar=1&LAN=DE A1 Li, Zhelu A1 Xie, Ning A1 Fan, Wei A1 Xi, Jianxiong A1 He, Lenian A1 Sun, Kexu PB Springer Science and Business Media LLC YR 2018 SN 0925-1030 SN 1573-1979 JF Analog Integrated Circuits and Signal Processing VO 100 IS 2 SP 295 OP 309 LK http://dx.doi.org/https://doi.org/10.1007/s10470-018-1368-1 DO https://doi.org/10.1007/s10470-018-1368-1 SF ELIB - SuUB Bremen
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