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1 Ergebnisse
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Area and delay optimized two step binary adder using carry ..:
Christilda, V. Dyana
;
Milton, A.
Analog Integrated Circuits and Signal Processing. 112 (2022) 3 - p. 433-441 , 2022
Link:
https://doi.org/10.1007/s10470-022-02064-5
RT Journal T1 <Title>Area and delay optimized two step binary adder using carry substitution algorithm for FIR filter</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1007_s10470-022-02064-5&Exemplar=1&LAN=DE A1 Christilda, V. Dyana A1 Milton, A. PB Springer Science and Business Media LLC YR 2022 SN 0925-1030 SN 1573-1979 JF Analog Integrated Circuits and Signal Processing VO 112 IS 3 SP 433 OP 441 LK http://dx.doi.org/https://doi.org/10.1007/s10470-022-02064-5 DO https://doi.org/10.1007/s10470-022-02064-5 SF ELIB - SuUB Bremen
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