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1
Low-Power Multiplier Design Using a Bypassing Technique:
Wang, Chua-Chin
;
Sung, Gang-Neng
Journal of Signal Processing Systems. 57 (2008) 3 - p. 331-338 , 2008
Link:
https://doi.org/10.1007/s11265-008-0319-y
RT Journal T1 <Title>Low-Power Multiplier Design Using a Bypassing Technique</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1007_s11265-008-0319-y&Exemplar=1&LAN=DE A1 Wang, Chua-Chin A1 Sung, Gang-Neng PB Springer Science and Business Media LLC YR 2008 SN 1939-8018 SN 1939-8115 JF Journal of Signal Processing Systems VO 57 IS 3 SP 331 OP 338 LK http://dx.doi.org/https://doi.org/10.1007/s11265-008-0319-y DO https://doi.org/10.1007/s11265-008-0319-y SF ELIB - SuUB Bremen
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