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Paper title: a highly efficient implementation of fractiona..:
Datta, Debarshi
;
Dutta, Himadri Sekhar
International Journal of Information Technology. 15 (2022) 1 - p. 101-106 , 2022
Link:
https://doi.org/10.1007/s41870-022-01124-3
RT Journal T1 <Title>Paper title: a highly efficient implementation of fractional sample rate digital down converter on FPGA</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1007_s41870-022-01124-3&Exemplar=1&LAN=DE A1 Datta, Debarshi A1 Dutta, Himadri Sekhar PB Springer Science and Business Media LLC YR 2022 SN 2511-2104 SN 2511-2112 JF International Journal of Information Technology VO 15 IS 1 SP 101 OP 106 LK http://dx.doi.org/https://doi.org/10.1007/s41870-022-01124-3 DO https://doi.org/10.1007/s41870-022-01124-3 SF ELIB - SuUB Bremen
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