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1 Ergebnisse
1
Development of a user friendly gate-level logic simulator:
Stigall, Paul D.
;
Shiv, Kumar
Computers & Electrical Engineering. 13 (1987) 3-4 - p. 147-167 , 1987
Link:
https://doi.org/10.1016/0045-7906(87)90009-7
RT Journal T1 <Title>Development of a user friendly gate-level logic simulator</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1016_0045-7906(87)90009-7&Exemplar=1&LAN=DE A1 Stigall, Paul D. A1 Shiv, Kumar PB Elsevier BV YR 1987 SN 0045-7906 JF Computers & Electrical Engineering VO 13 IS 3-4 SP 147 OP 167 LK http://dx.doi.org/https://doi.org/10.1016/0045-7906(87)90009-7 DO https://doi.org/10.1016/0045-7906(87)90009-7 SF ELIB - SuUB Bremen
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