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A normal I/O order optimized dual-mode pipelined FFT archit..:
Xavier Chelliah, Antony Xavier Glittas
AEU - International Journal of Electronics and Communications. 170 (2023) - p. 154782 , 2023
Link:
https://doi.org/10.1016/j.aeue.2023.154782
RT Journal T1 <Title>A normal I/O order optimized dual-mode pipelined FFT architecture for processing real-valued signals and complex-valued signals</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1016_j.aeue.2023.154782&Exemplar=1&LAN=DE A1 Xavier Chelliah, Antony Xavier Glittas PB Elsevier BV YR 2023 SN 1434-8411 JF AEU - International Journal of Electronics and Communications VO 170 SP 154782 LK http://dx.doi.org/https://doi.org/10.1016/j.aeue.2023.154782 DO https://doi.org/10.1016/j.aeue.2023.154782 SF ELIB - SuUB Bremen
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