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Design and analysis of PVT tolerant hybrid current starved ..:
Sivasakthi, M.
;
Radhika, P.
AEU - International Journal of Electronics and Communications. 173 (2024) - p. 154987 , 2024
Link:
https://doi.org/10.1016/j.aeue.2023.154987
RT Journal T1 <Title>Design and analysis of PVT tolerant hybrid current starved ring VCO with bulk driven keeper technique at 45 nm CMOS technology for the PLL application</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1016_j.aeue.2023.154987&Exemplar=1&LAN=DE A1 Sivasakthi, M. A1 Radhika, P. PB Elsevier BV YR 2024 SN 1434-8411 JF AEU - International Journal of Electronics and Communications VO 173 SP 154987 LK http://dx.doi.org/https://doi.org/10.1016/j.aeue.2023.154987 DO https://doi.org/10.1016/j.aeue.2023.154987 SF ELIB - SuUB Bremen
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