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1 Ergebnisse
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Simulation of CMOS logic inverter based on vertically stack..:
Min, So Ra
;
Lee, Sang Ho
;
Park, Jin
...
Current Applied Physics. 43 (2022) - p. 106-115 , 2022
Link:
https://doi.org/10.1016/j.cap.2022.08.015
RT Journal T1
Simulation of CMOS logic inverter based on vertically stacked polycrystalline silicon nanosheet gate-all-around MOSFET and its electrical characteristics
UL https://suche.suub.uni-bremen.de/peid=cr-10.1016_j.cap.2022.08.015&Exemplar=1&LAN=DE A1 Min, So Ra A1 Lee, Sang Ho A1 Park, Jin A1 Kim, Geon Uk A1 Kang, Ga Eon A1 Heo, Jun Hyeok A1 Yoon, Young Jun A1 Seo, Jae Hwa A1 Jang, Jaewon A1 Bae, Jin-Hyuk A1 Lee, Sin-Hyung A1 Kang, In Man PB Elsevier BV YR 2022 SN 1567-1739 JF Current Applied Physics VO 43 SP 106 OP 115 LK http://dx.doi.org/https://doi.org/10.1016/j.cap.2022.08.015 DO https://doi.org/10.1016/j.cap.2022.08.015 SF ELIB - SuUB Bremen
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