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1 Ergebnisse
1
Fast Multiplier Generator for FPGAs with LUT based Partial ..:
Kakacak, Ahmet
;
Guzel, Aydin Emre
;
Cihangir, Ozan
..
Integration. 57 (2017) - p. 147-157 , 2017
Link:
https://doi.org/10.1016/j.vlsi.2016.12.012
RT Journal T1
Fast Multiplier Generator for FPGAs with LUT based Partial Product Generation and Column/row Compression
UL https://suche.suub.uni-bremen.de/peid=cr-10.1016_j.vlsi.2016.12.012&Exemplar=1&LAN=DE A1 Kakacak, Ahmet A1 Guzel, Aydin Emre A1 Cihangir, Ozan A1 Gören, Sezer A1 Ugurdag, H. Fatih PB Elsevier BV YR 2017 SN 0167-9260 JF Integration VO 57 SP 147 OP 157 LK http://dx.doi.org/https://doi.org/10.1016/j.vlsi.2016.12.012 DO https://doi.org/10.1016/j.vlsi.2016.12.012 SF ELIB - SuUB Bremen
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