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Design and implementation of bit-parallel RSFQ shift regist..:
Xu, Wanning
;
Ying, Liliang
;
Lin, Qian
..
Superconductor Science and Technology. 34 (2021) 8 - p. 085002 , 2021
Link:
https://doi.org/10.1088/1361-6668/ac086e
RT Journal T1 <Title>Design and implementation of bit-parallel RSFQ shift register memories</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1088_1361-6668_ac086e&Exemplar=1&LAN=DE A1 Xu, Wanning A1 Ying, Liliang A1 Lin, Qian A1 Ren, Jie A1 Wang, Zhen PB IOP Publishing YR 2021 SN 0953-2048 SN 1361-6668 JF Superconductor Science and Technology VO 34 IS 8 SP 085002 LK http://dx.doi.org/https://doi.org/10.1088/1361-6668/ac086e DO https://doi.org/10.1088/1361-6668/ac086e SF ELIB - SuUB Bremen
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