I agree that this site is using cookies. You can find further informations
here
.
X
Login
Merkliste (
0
)
Home
About us
Home About us
Our history
Profile
Press & public relations
Friends
The library in figures
Exhibitions
Projects
Training, internships, careers
Films
Services & Information
Home Services & Information
Lending and interlibrary loans
Returns and renewals
Training and library tours
My Account
Library cards
New to the library?
Download Information
Opening hours
Learning spaces
PC, WLAN, copy, scan and print
Catalogs and collections
Home Catalogs and Collections
Rare books and manuscripts
Digital collections
Subject Areas
Our sites
Home Our sites
Central Library
Law Library (Juridicum)
BB Business and Economics (BB11)
BB Physics and Electrical Engineering
TB Engineering and Social Sciences
TB Economics and Nautical Sciences
TB Music
TB Art & Design
TB Bremerhaven
Contact the library
Home Contact the library
Staff Directory
Open access & publishing
Home Open access & publishing
Reference management: Citavi & RefWorks
Publishing documents
Open Access in Bremen
zur Desktop-Version
Toggle navigation
Merkliste
1 Ergebnisse
1
A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reco..:
Park, Dong-Hyeon
;
Pal, Subhankar
;
Feng, Siying
...
IEEE Journal of Solid-State Circuits. 55 (2020) 4 - p. 933-944 , 2020
Link:
https://doi.org/10.1109/jssc.2019.2960480
RT Journal T1
A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix–Matrix Multiplication Accelerator
UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_jssc.2019.2960480&Exemplar=1&LAN=DE A1 Park, Dong-Hyeon A1 Pal, Subhankar A1 Feng, Siying A1 Gao, Paul A1 Tan, Jielun A1 Rovinski, Austin A1 Xie, Shaolin A1 Zhao, Chun A1 Amarnath, Aporva A1 Wesley, Timothy A1 Beaumont, Jonathan A1 Chen, Kuan-Yu A1 Chakrabarti, Chaitali A1 Taylor, Michael Bedford A1 Mudge, Trevor A1 Blaauw, David A1 Kim, Hun-Seok A1 Dreslinski, Ronald G. PB Institute of Electrical and Electronics Engineers (IEEE) YR 2020 SN 0018-9200 SN 1558-173X JF IEEE Journal of Solid-State Circuits VO 55 IS 4 SP 933 OP 944 LK http://dx.doi.org/https://doi.org/10.1109/jssc.2019.2960480 DO https://doi.org/10.1109/jssc.2019.2960480 SF ELIB - SuUB Bremen
Export
RefWorks (nur Desktop-Version!)
Flow
(Zuerst in
Flow
einloggen, dann importieren)