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1 Ergebnisse
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A Bit-Serial, Compute-in-SRAM Design Featuring Hybrid-Integ..:
Sehgal, Rishabh
;
Thareja, Tanmay
;
Xie, Shanshan
..
IEEE Journal of Solid-State Circuits. 58 (2023) 7 - p. 2109-2124 , 2023
Link:
https://doi.org/10.1109/jssc.2023.3235210
RT Journal T1
A Bit-Serial, Compute-in-SRAM Design Featuring Hybrid-Integrating ADCs and Input Dependent Binary Scaled Precharge Eliminating DACs for Energy-Efficient DNN Inference
UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_jssc.2023.3235210&Exemplar=1&LAN=DE A1 Sehgal, Rishabh A1 Thareja, Tanmay A1 Xie, Shanshan A1 Ni, Can A1 Kulkarni, Jaydeep P. PB Institute of Electrical and Electronics Engineers (IEEE) YR 2023 SN 0018-9200 SN 1558-173X JF IEEE Journal of Solid-State Circuits VO 58 IS 7 SP 2109 OP 2124 LK http://dx.doi.org/https://doi.org/10.1109/jssc.2023.3235210 DO https://doi.org/10.1109/jssc.2023.3235210 SF ELIB - SuUB Bremen
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