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Automated source-level error localization in hardware desig..:
Peischl, B.
;
Wotawa, F.
IEEE Design & Test of Computers. 23 (2006) 1 - p. 8-19 , 2006
Link:
https://doi.org/10.1109/mdt.2006.5
RT Journal T1 <Title>Automated source-level error localization in hardware designs</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_mdt.2006.5&Exemplar=1&LAN=DE A1 Peischl, B. A1 Wotawa, F. PB Institute of Electrical and Electronics Engineers (IEEE) YR 2006 SN 0740-7475 JF IEEE Design & Test of Computers VO 23 IS 1 SP 8 OP 19 LK http://dx.doi.org/https://doi.org/10.1109/mdt.2006.5 DO https://doi.org/10.1109/mdt.2006.5 SF ELIB - SuUB Bremen
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