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1 Ergebnisse
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XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/o..:
Conti, Francesco
;
Schiavone, Pasquale Davide
;
Benini, Luca
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 37 (2018) 11 - p. 2940-2951 , 2018
Link:
https://doi.org/10.1109/tcad.2018.2857019
RT Journal T1 <Title>XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tcad.2018.2857019&Exemplar=1&LAN=DE A1 Conti, Francesco A1 Schiavone, Pasquale Davide A1 Benini, Luca PB Institute of Electrical and Electronics Engineers (IEEE) YR 2018 SN 0278-0070 SN 1937-4151 JF IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems VO 37 IS 11 SP 2940 OP 2951 LK http://dx.doi.org/https://doi.org/10.1109/tcad.2018.2857019 DO https://doi.org/10.1109/tcad.2018.2857019 SF ELIB - SuUB Bremen
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