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1 Ergebnisse
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Three-Input Gates for Logic Synthesis:
Marakkalage, Dewmini Sudara
;
Testa, Eleonora
;
Riener, Heinz
...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 40 (2021) 10 - p. 2184-2188 , 2021
Link:
https://doi.org/10.1109/tcad.2020.3032625
RT Journal T1 <Title>Three-Input Gates for Logic Synthesis</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tcad.2020.3032625&Exemplar=1&LAN=DE A1 Marakkalage, Dewmini Sudara A1 Testa, Eleonora A1 Riener, Heinz A1 Mishchenko, Alan A1 Soeken, Mathias A1 De Micheli, Giovanni PB Institute of Electrical and Electronics Engineers (IEEE) YR 2021 SN 0278-0070 SN 1937-4151 JF IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems VO 40 IS 10 SP 2184 OP 2188 LK http://dx.doi.org/https://doi.org/10.1109/tcad.2020.3032625 DO https://doi.org/10.1109/tcad.2020.3032625 SF ELIB - SuUB Bremen
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