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A Formal Framework for Maximum Error Estimation in Approxim..:
Scarabottolo, Ilaria
;
Ansaloni, Giovanni
;
Constantinides, George A.
.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 41 (2022) 4 - p. 840-853 , 2022
Link:
https://doi.org/10.1109/tcad.2021.3075651
RT Journal T1 <Title>A Formal Framework for Maximum Error Estimation in Approximate Logic Synthesis</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tcad.2021.3075651&Exemplar=1&LAN=DE A1 Scarabottolo, Ilaria A1 Ansaloni, Giovanni A1 Constantinides, George A. A1 Pozzi, Laura PB Institute of Electrical and Electronics Engineers (IEEE) YR 2022 SN 0278-0070 SN 1937-4151 JF IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems VO 41 IS 4 SP 840 OP 853 LK http://dx.doi.org/https://doi.org/10.1109/tcad.2021.3075651 DO https://doi.org/10.1109/tcad.2021.3075651 SF ELIB - SuUB Bremen
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