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1 Ergebnisse
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An Incremental Placement Flow for Advanced FPGAs With Timin..:
Lin, Zhifeng
;
Xie, Yanyue
;
Zou, Peng
...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 41 (2022) 9 - p. 3092-3103 , 2022
Link:
https://doi.org/10.1109/tcad.2021.3120070
RT Journal T1 <Title>An Incremental Placement Flow for Advanced FPGAs With Timing Awareness</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tcad.2021.3120070&Exemplar=1&LAN=DE A1 Lin, Zhifeng A1 Xie, Yanyue A1 Zou, Peng A1 Wang, Sifei A1 Yu, Jun A1 Chen, Jianli PB Institute of Electrical and Electronics Engineers (IEEE) YR 2022 SN 0278-0070 SN 1937-4151 JF IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems VO 41 IS 9 SP 3092 OP 3103 LK http://dx.doi.org/https://doi.org/10.1109/tcad.2021.3120070 DO https://doi.org/10.1109/tcad.2021.3120070 SF ELIB - SuUB Bremen
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