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Snap-3D: A Constrained Placement-Driven Physical Design Met..:
Vanna-Iampikul, Pruek
;
Shao, Chengjia
;
Lu, Yi-Chen
...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 42 (2023) 7 - p. 2331-2335 , 2023
Link:
https://doi.org/10.1109/tcad.2022.3218763
RT Journal T1 <Title>Snap-3D: A Constrained Placement-Driven Physical Design Methodology for High Performance 3-D ICs</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tcad.2022.3218763&Exemplar=1&LAN=DE A1 Vanna-Iampikul, Pruek A1 Shao, Chengjia A1 Lu, Yi-Chen A1 Pentapati, Sai A1 Heo, Yun A1 Choi, Jae-Seung A1 Lim, Sung Kyu PB Institute of Electrical and Electronics Engineers (IEEE) YR 2023 SN 0278-0070 SN 1937-4151 JF IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems VO 42 IS 7 SP 2331 OP 2335 LK http://dx.doi.org/https://doi.org/10.1109/tcad.2022.3218763 DO https://doi.org/10.1109/tcad.2022.3218763 SF ELIB - SuUB Bremen
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