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1 Ergebnisse
1
CorrectNet+: Dealing With HW Non-Idealities in In-Memory-Co..:
Eldebiky, Amro
;
Zhang, Grace Li
;
Böcherer, Georg
..
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 43 (2024) 2 - p. 573-585 , 2024
Link:
https://doi.org/10.1109/tcad.2023.3313089
RT Journal T1 <Title>CorrectNet+: Dealing With HW Non-Idealities in In-Memory-Computing Platforms by Error Suppression and Compensation</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tcad.2023.3313089&Exemplar=1&LAN=DE A1 Eldebiky, Amro A1 Zhang, Grace Li A1 Böcherer, Georg A1 Li, Bing A1 Schlichtmann, Ulf PB Institute of Electrical and Electronics Engineers (IEEE) YR 2024 SN 0278-0070 SN 1937-4151 JF IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems VO 43 IS 2 SP 573 OP 585 LK http://dx.doi.org/https://doi.org/10.1109/tcad.2023.3313089 DO https://doi.org/10.1109/tcad.2023.3313089 SF ELIB - SuUB Bremen
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