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1 Ergebnisse
1
BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Sub..:
Gu, Tianchen
;
Li, Wangzhen
;
Zhao, Aidong
...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 43 (2024) 2 - p. 417-430 , 2024
Link:
https://doi.org/10.1109/tcad.2023.3314519
RT Journal T1 <Title>BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tcad.2023.3314519&Exemplar=1&LAN=DE A1 Gu, Tianchen A1 Li, Wangzhen A1 Zhao, Aidong A1 Bi, Zhaori A1 Li, Xudong A1 Yang, Fan A1 Yan, Changhao A1 Hu, Wenchuang A1 Zhou, Dian A1 Cui, Tao A1 Liu, Xin A1 Zhang, Zaikun A1 Zeng, Xuan PB Institute of Electrical and Electronics Engineers (IEEE) YR 2024 SN 0278-0070 SN 1937-4151 JF IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems VO 43 IS 2 SP 417 OP 430 LK http://dx.doi.org/https://doi.org/10.1109/tcad.2023.3314519 DO https://doi.org/10.1109/tcad.2023.3314519 SF ELIB - SuUB Bremen
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