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1 Ergebnisse
1
Analysis and Design of a Sub-Sampling PLL of Low Phase Nois..:
Xu, Hao
;
Ji, Shujiang
;
Wang, Yizhuo
...
IEEE Transactions on Circuits and Systems I: Regular Papers. 71 (2024) 8 - p. 3597-3607 , 2024
Link:
https://doi.org/10.1109/tcsi.2024.3380600
RT Journal T1 <Title>Analysis and Design of a Sub-Sampling PLL of Low Phase Noise and Low Reference Spur</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tcsi.2024.3380600&Exemplar=1&LAN=DE A1 Xu, Hao A1 Ji, Shujiang A1 Wang, Yizhuo A1 Lin, Xinyi A1 Min, Hao A1 Yan, Na PB Institute of Electrical and Electronics Engineers (IEEE) YR 2024 SN 1549-8328 SN 1558-0806 JF IEEE Transactions on Circuits and Systems I: Regular Papers VO 71 IS 8 SP 3597 OP 3607 LK http://dx.doi.org/https://doi.org/10.1109/tcsi.2024.3380600 DO https://doi.org/10.1109/tcsi.2024.3380600 SF ELIB - SuUB Bremen
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