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1 Ergebnisse
1
FDM: Fused Double-Multiply Design for Low-Latency and Area-..:
Wang, Yu
;
Liang, Xingcheng
;
Niu, Shuai
...
IEEE Transactions on Circuits and Systems II: Express Briefs. 71 (2024) 1 - p. 450-454 , 2024
Link:
https://doi.org/10.1109/tcsii.2023.3307676
RT Journal T1 <Title>FDM: Fused Double-Multiply Design for Low-Latency and Area- and Power-Efficient Implementation</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tcsii.2023.3307676&Exemplar=1&LAN=DE A1 Wang, Yu A1 Liang, Xingcheng A1 Niu, Shuai A1 Zhang, Chi A1 Lyu, Fei A1 Luo, Yuanyong PB Institute of Electrical and Electronics Engineers (IEEE) YR 2024 SN 1549-7747 SN 1558-3791 JF IEEE Transactions on Circuits and Systems II: Express Briefs VO 71 IS 1 SP 450 OP 454 LK http://dx.doi.org/https://doi.org/10.1109/tcsii.2023.3307676 DO https://doi.org/10.1109/tcsii.2023.3307676 SF ELIB - SuUB Bremen
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