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1 Ergebnisse
1
Imbalanced Large Graph Learning Framework for FPGA Logic El..:
Di, Zhixiong
;
Tao, Runzhe
;
Chen, Lin
..
IEEE Transactions on Circuits and Systems II: Express Briefs. 71 (2024) 4 - p. 2034-2038 , 2024
Link:
https://doi.org/10.1109/tcsii.2023.3334247
RT Journal T1
Imbalanced Large Graph Learning Framework for FPGA Logic Elements Packing Prediction
UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tcsii.2023.3334247&Exemplar=1&LAN=DE A1 Di, Zhixiong A1 Tao, Runzhe A1 Chen, Lin A1 Wu, Qiang A1 Lin, Yibo PB Institute of Electrical and Electronics Engineers (IEEE) YR 2024 SN 1549-7747 SN 1558-3791 JF IEEE Transactions on Circuits and Systems II: Express Briefs VO 71 IS 4 SP 2034 OP 2038 LK http://dx.doi.org/https://doi.org/10.1109/tcsii.2023.3334247 DO https://doi.org/10.1109/tcsii.2023.3334247 SF ELIB - SuUB Bremen
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