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Comprehensive Reliability-Aware Statistical Timing Analysis..:
Liu, Taizhi
;
Chen, Chang-Chih
;
Milor, Linda
IEEE Transactions on Emerging Topics in Computing. 6 (2018) 2 - p. 219-232 , 2018
Link:
https://doi.org/10.1109/tetc.2016.2588724
RT Journal T1 <Title>Comprehensive Reliability-Aware Statistical Timing Analysis Using a Unified Gate-Delay Model for Microprocessors</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tetc.2016.2588724&Exemplar=1&LAN=DE A1 Liu, Taizhi A1 Chen, Chang-Chih A1 Milor, Linda PB Institute of Electrical and Electronics Engineers (IEEE) YR 2018 SN 2168-6750 JF IEEE Transactions on Emerging Topics in Computing VO 6 IS 2 SP 219 OP 232 LK http://dx.doi.org/https://doi.org/10.1109/tetc.2016.2588724 DO https://doi.org/10.1109/tetc.2016.2588724 SF ELIB - SuUB Bremen
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