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Impact Analysis On A Memory Hierarchy Applied To IPNoSys Ar..:
Lima Damasceno, Alexandro
;
Roberto Fernandes, Silvio
;
Girao Barreto da Silva, Gustavo
IEEE Latin America Transactions. 15 (2017) 4 - p. 619-625 , 2017
Link:
https://doi.org/10.1109/tla.2017.7896346
RT Journal T1
Impact Analysis On A Memory Hierarchy Applied To IPNoSys Architecture
UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tla.2017.7896346&Exemplar=1&LAN=DE A1 Lima Damasceno, Alexandro A1 Roberto Fernandes, Silvio A1 Girao Barreto da Silva, Gustavo PB Institute of Electrical and Electronics Engineers (IEEE) YR 2017 SN 1548-0992 JF IEEE Latin America Transactions VO 15 IS 4 SP 619 OP 625 LK http://dx.doi.org/https://doi.org/10.1109/tla.2017.7896346 DO https://doi.org/10.1109/tla.2017.7896346 SF ELIB - SuUB Bremen
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