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1 Ergebnisse
1
Yield Enhancement by Bad-Die Recycling and Stacking With Th..:
Chou, Yung-Fa
;
Kwai, Ding-Ming
;
Wu, Cheng-Wen
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 19 (2011) 8 - p. 1346-1356 , 2011
Link:
https://doi.org/10.1109/tvlsi.2010.2051466
RT Journal T1
Yield Enhancement by Bad-Die Recycling and Stacking With Though-Silicon Vias
UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tvlsi.2010.2051466&Exemplar=1&LAN=DE A1 Chou, Yung-Fa A1 Kwai, Ding-Ming A1 Wu, Cheng-Wen PB Institute of Electrical and Electronics Engineers (IEEE) YR 2011 SN 1063-8210 SN 1557-9999 JF IEEE Transactions on Very Large Scale Integration (VLSI) Systems VO 19 IS 8 SP 1346 OP 1356 LK http://dx.doi.org/https://doi.org/10.1109/tvlsi.2010.2051466 DO https://doi.org/10.1109/tvlsi.2010.2051466 SF ELIB - SuUB Bremen
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