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Pulsed-Latch Utilization for Clock-Tree Power Optimization:

Lin, Hong-Ting ; Chuang, Yi-Lin ; Yang, Zong-Han.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  22 (2014)  4 - p. 721-733 , 2014
Link: https://doi.org/10.1109/tvlsi.2013.2252211