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1 Ergebnisse
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A 3.85-Gb/s 8 × 8 Soft-Output MIMO Detector With Lattice-Re..:
Liang, Zhuojun
;
Lv, Dongxu
;
Cui, Chao
...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29 (2021) 2 - p. 307-320 , 2021
Link:
https://doi.org/10.1109/tvlsi.2020.3036822
RT Journal T1 <Title>A 3.85-Gb/s 8 × 8 Soft-Output MIMO Detector With Lattice-Reduction-Aided Channel Preprocessing</Title> UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tvlsi.2020.3036822&Exemplar=1&LAN=DE A1 Liang, Zhuojun A1 Lv, Dongxu A1 Cui, Chao A1 Chen, Hai-Bao A1 He, Weifeng A1 Sheng, Weiguang A1 Jing, Naifeng A1 Mao, Zhigang A1 He, Guanghui PB Institute of Electrical and Electronics Engineers (IEEE) YR 2021 SN 1063-8210 SN 1557-9999 JF IEEE Transactions on Very Large Scale Integration (VLSI) Systems VO 29 IS 2 SP 307 OP 320 LK http://dx.doi.org/https://doi.org/10.1109/tvlsi.2020.3036822 DO https://doi.org/10.1109/tvlsi.2020.3036822 SF ELIB - SuUB Bremen
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