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Clock Delivery Network Design and Analysis for Interposer-B..:

Murali, Gauthaman ; Park, Heechun ; Qin, Eric...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  29 (2021)  4 - p. 605-616 , 2021
Link: https://doi.org/10.1109/tvlsi.2021.3058300