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1 Ergebnisse
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Enabling Write-Reduction Multiversion Scheme With Efficient..:
Wang, I-Ju
;
Liang, Yu-Pei
;
Chen, Tseng-Yi
...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29 (2021) 6 - p. 1244-1256 , 2021
Link:
https://doi.org/10.1109/tvlsi.2021.3072233
RT Journal T1
Enabling Write-Reduction Multiversion Scheme With Efficient Dual-Range Query Over NVRAM
UL https://suche.suub.uni-bremen.de/peid=cr-10.1109_tvlsi.2021.3072233&Exemplar=1&LAN=DE A1 Wang, I-Ju A1 Liang, Yu-Pei A1 Chen, Tseng-Yi A1 Chang, Yuan-Hao A1 Chen, Bo-Jun A1 Wei, Hsin-Wen A1 Shih, Wei-Kuan PB Institute of Electrical and Electronics Engineers (IEEE) YR 2021 SN 1063-8210 SN 1557-9999 JF IEEE Transactions on Very Large Scale Integration (VLSI) Systems VO 29 IS 6 SP 1244 OP 1256 LK http://dx.doi.org/https://doi.org/10.1109/tvlsi.2021.3072233 DO https://doi.org/10.1109/tvlsi.2021.3072233 SF ELIB - SuUB Bremen
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